Short technical notes from Amodo engineers — research, methods, and works in progress.
We rebuilt our inference verification prototype around an asynchronous ledger so it can work with passive network TAPs, verify multiple models on a Kubernetes cluster, and measure verifier vs. prover compute. Early results show a 2–8× verifier compute advantage.
Hashing network traffic creates a tamper-evident record of what data has transited a link. We benchmark line-rate hashing at 400GbE across CPU and DPU hardware, with an interactive dashboard of the results.
Wiping cluster memory and proving that it's been wiped. Initial experiments with H200s.
Our first attempt at AI inference verification: implementing and testing DiFR on a tray of H100s against example model attacks (append and append-on-trigger), across 37,500 prompt runs.
Recomputation-based schemes for verifying that an AI cluster ran the workloads it declared — covering inference (TOPLOC, Token-DiFR) and pre-training — plus the non-determinism, game theory, and practicalities that make them work.
Wiping cluster memory and proving that it's been wiped. Initial experiments with H200s.
Verification technologies might be useful even if you're not shooting for an international agreement. Here are a few reasons why.
Verification is a process, not a one-shot solution. A ladder of technical mechanisms can build trust towards high-stakes coordination over AI — and nuclear verification history shows how the early rungs get climbed.
Verifying what a compute cluster is doing might involve "tapping" the network — copying network packets for recomputation. These notes explore what it might take to do that.
We mapped the power delivery systems of AI data centers. Our diagram explores the data available at each stage, measurement techniques and signals of interest for AI security.
A quick test installation of a 10G network tap for AI verification — passive vs active taps, fibre types, and what scales to production speeds.
We used a DPU as a tray-level bandwidth limiter — an extra layer of security for protecting model weights, achieving near line-rate encryption with hardware-offloaded IPsec.