Team blog
ai-verification
The UK's next AI bet should be AI Verification
AISI is one of the UK's few pieces of international leverage in the AI race. More bets are needed, and AI verification technologies should be the next one.
AI security & verification programme
AI Verification
Building verification mechanisms for high-stakes coordination over AI development and deployment.
No single lab, evaluator, or government can make frontier AI safe on its own. As capabilities grow, safety increasingly depends on coordination, and coordination depends on trust. Our engineering team works on the technical mechanisms that underlie high-stakes coordination.
Our goal is to make it inevitable that verification mechanisms are built. We don’t have to be the ones who develop the final systems, but we do need to make sure someone — possibly ourselves — does the work. As such, we work in two ways.
- Proactive verification tech R&D. We are developing proofs of concept of foundational verification primitives, and running full verification system prototypes.
- Government and AI lab collaborations. Verification ultimately interfaces with governments and AI developers; we spend time speaking with and supporting any stakeholders interested in advancing verification.
Latest essays
Team blog
ai-verification
AI Verification is needed for the US & China to pace AI development
What tools are available to ensure everyone sticks to the rules on pacing frontier AI development? Written with Lucid Computing.
Technical notes
TN-012 · Memory wipes
Memory Wipes - Filling in the Gaps
Follow-up to our memory wiping work: the NVIDIA BlueField-3 DPU and its BMC were large, unwiped pieces of the compute tray. Being Arm rather than x86, the carve-out, cache flushing and memory discovery all change. We found the DPU can be wiped in under 2 hours.
TN-011 · Network taps
Fitting a Network TAP to our Inference Verification Prototype
We fitted a passive optical TAP to our inference recomputation prototype. A frame processor reconstructs inference requests from the tapped link and checks all other traffic against a whitelist. It verified 800 requests while the link was flooded with 1 Gbps of noise.
Memory Wipes - Filling in the Gaps
Follow-up to our memory wiping work: the NVIDIA BlueField-3 DPU and its BMC were large, unwiped pieces of the compute tray. Being Arm rather than x86, the carve-out, cache flushing and memory discovery all change. We found the DPU can be wiped in under 2 hours.
TN-011 · Network taps
Fitting a Network TAP to our Inference Verification Prototype
We fitted a passive optical TAP to our inference recomputation prototype. A frame processor reconstructs inference requests from the tapped link and checks all other traffic against a whitelist. It verified 800 requests while the link was flooded with 1 Gbps of noise.
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Improving Disk Wiping Speed for Memory Wipes
20 min
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Scaling Recomputation Inference Verification
11 min
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Network Traffic Hashing
24 min
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Memory Wipes - Performance Analysis
17 min
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An Inference Verification Prototype — Stage 1
15 min
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Example Schemes for Verifying High-Stakes AI Agreements
13 min
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Network Tapping for AI Verification: A Technical Assessment
12 min
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Understanding Data Center Power Delivery
1 min
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Network Taps — A First Test
6 min
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The Tray as a Bandwidth Boundary
10 min
Follow AI verification public statements at www.ai-verification.com/news
Open the timeline ↗Form S-1 registration statement (IPO prospectus)
Anthropic
“We believe the first step toward “pacing the frontier” is independent verification of compliance with future regulatory standards.”Source ↗
Side Channel Cloud
Free security and verification research infrastructure.
- Power side channels
- Network TAPs
- Software-defined radios
- Bare-metal access
- DPUs · FPGAs · SmartNICs